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BL24S64 64 kbits ( 8,192 8) BL24S64 64kbits (8,192 8) belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 1 - 1 2 f eatures ? compatible with all i 2 c b idirectiona l data transfer protocol ? memory array: C 64 kbit s ( 8 kbytes) of eeprom C page size: 32 bytes ? single supply voltage and high speed: C 1 mhz 1.7 v random and sequential read modes ? write: C byte write within 3 ms C page write within 3 ms C partial page writes allowed ? s oft ware data protec t ion ? schmitt trigger, filtered inputs for noise suppression ? high - reliability C endurance: 1 million write cycles C data retention: 100 years ? enhanced esd/latch - up protection C hbm 8000v ? wlcsp4 packages d escription ? the BL24S64 provides 65536 bits of serial electrically erasable and programmable read - only memory (eeprom), organized as 8192 words of 8 bits each. ? the device is optimized for use in many industrial and commercial applications where low - power and low - voltage operatio n are essential. pin configuration 1 2 a b v c c v s s s c l s d a w l c s p 4 m a r k i n g s i d e ( t o p v i e w )
BL24S64 64 kbits ( 8,192 8) BL24S64 64kbits (8,192 8) belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 2 - 1 2 pin descriptions table 1 block diagram figure 1 serial data (sda): the sda pin is bi - directional for serial data transfer. this pin is open - drain driven and may be wire - ored with any number of other open - drain or open - collector devices. serial clock (scl): the scl input is used to positive edge clock data into each eepr om device and negative edge clock data out of each device. pin name type functions sda i/o serial data scl i serial clock input gnd p ground vcc p power supply s t a r t s t o p l o g i c s e r i a l c o n t r o l l o g i c s c l s d a g n d v c c d e v i c e a d d r e s s c o m p a r a t o r l o a d c c m p d a t a w o r d a d r e s s c o u n t e r l o a d i n c x d e c o d e r y d e c o d e r s e r i a l m u x e e p r o m e n d a t a r e c o v e r y h i g h v o l t a g e p u m p / t i m i n g d o u t / a c k n o w l e d g e d i n d o u t
BL24S64 64 kbits ( 8,192 8) BL24S64 64kbits (8,192 8) belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 3 - 1 2 functional description 1. memory organization BL24S64 , 64k serial eeprom: internally organized with 256 pages of 32 bytes each, the 64k requires a 1 3 - bit data word address for random word addressing. 2. device operation clock and data transitions: the sda pin is normally pulled high with an external device. data on the sda pin may change only during scl low time periods (see figure 2 ). data changes during scl high periods will indicate a start or stop condition as defined below. start condition: a high - to - low transition of sda with scl high is a start condition which must precede any other command (see figure 3 ). stop condition: a low - to - high transition of sda with scl high is a stop condition. after a read sequence, the stop command will place the eeprom in a standby power mode (see figure 3 ). acknowledge: all addresses and data words are serially transmitted to and from the eeprom in 8 - bit words. the eeprom sends a "0" to acknowledge that it has received each word. this happens during the ninth clock cycle. standby mode: the BL24S64 features a low - power standby mode which is enabled: (a) upon power - up and (b) af t er the receipt of the stop bit and the completion of a ny internal operations. memory reset: after an interruption in protocol, power loss or system reset, any two - wire part can be reset by following these steps: 1. clock up to 9 cycles. 2. look for sda high in each cycle while scl is high. 3. create a start condition.
BL24S64 64 kbits ( 8,192 8) BL24S64 64kbits (8,192 8) belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 4 - 1 2 figure 2 . data validity figure 3. start and stop definition figure 4. output acknowledge d a t a s t a b l e d a t a s t a b l e d a t a c h a n g e s d a s c l s d a s c l s t a r t s t o p s c l d a t a i n d a t a o u t s t a r t a c k n o w l e d g e 1 8 9
BL24S64 64 kbits ( 8,192 8) BL24S64 64kbits (8,192 8) belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 5 - 1 2 3. device addressing the 64k eeprom devices all require an 8 - bit device address word following a start condition to enable the chip for a read or write operation (see figure 5 ) the device address word consists of a mandatory "1", "0" sequence for the first four most significant bits as shown. this is common to all the serial eeprom devices. t he fifth, sixth and seventh bits of the device address are set to "0" . the eighth bit of the device address is the read/write operation select bit. a read operation is initiated i f this bit is high and a write operation is initiated if this bit is low. 4. write operations byte write: a write operation requires an 8 - bit data word address following the device address word and acknowledgment. upon receipt of this address, the eeprom will again respond with a "0" and then clock in the first 8 - bit data word. following receipt of the 8 - bit d ata word , the eeprom will output a "0" and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. at this time the eeprom enters an internally timed write cycle, t wr, to the nonvolatile memory. all inputs are disabled during this write cycle and the eeprom will not respond until the write is complete (see figure 6 ). page write: a write operation requires an 8 - bit data word address following the device address word and acknowledgment. upon receipt of this address, the eeprom will again respond with a "0" and then clock in the first 8 - bit data word. following receipt of the 8 - bit data word , the eeprom will output a "0" and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. at this time the eeprom enters an internally timed write cycle, t wr, to the nonvolatile memory. all input s are disabled during this write cycle and the eeprom will not respond until the write is complete (see figure 7 ). the data word address lower five bits are internally incremented following the receipt of each data word. the higher data word address bits are not incremented, retaining the memory page row location. when the word address, internally generated, reaches the page boundary, the following b yte is placed at the beginning of the same page. if more than 32 data words are transmitted to the eeprom, the data word address will " roll over " and previous data will be overwritten. 5. software write p rotection : a write protection operation requires a command 0xf0 f ollowing the start, and the eeprom only allow normal read operation. t he eeprom allows normal write/ read operation when send command 0 x 8 0 following the start (see figure 8 ). 6. read operations read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to "1". there are three read operations: current address read, random address read and sequential read.
BL24S64 64 kbits ( 8,192 8) BL24S64 64kbits (8,192 8) belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 6 - 1 2 current address read: the internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. this address stays valid between operations as long as the chip power is maintained. the address "roll over" during read is from the last byte of the l ast memory page to the first byte of the first page. the address "roll over" during write is from the last byte of the current page to the first byte of the same page. once the device address with the read/write select bit set to "1" is clocked in and ackn owledged by the eeprom, the current address data word is serially clocked out. the microcontroller does not respond with an input "0" but does generate a following stop condition (see figure 9 ). random read: a random read requires a "dummy" byte write sequence to load in the data word address. once the device address word and data word address are clocked in and acknowledged by the eeprom, the microcontroller must generate another start condition. the microcon troller now initiates a current address read by sending a device address with the read/write select bit high. the eeprom acknowledges the device address and serially clocks out the data word. the microcontroller does not respond with a "0" but does generat e a following stop condition (see figure 10 ) sequential read: sequential reads are initiated by either a current address read or a random address read. after the microcontroller receives a data word, it responds with an acknowledge. as long as the eeprom r eceives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. when the memory address limit is reached, the data word address will "roll over" and the sequential read will continue. the sequential read operation is terminated when the microcontroller does not respond with a "0" but does generate a following stop condition (see figure 1 1 ). table 2 . first word addr e ss table 3 . second word address figure 5. device address 0 0 0 b 1 2 b 1 1 b 1 0 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 1 0 1 0 0 0 0 r / w m s b l s b
BL24S64 64 kbits ( 8,192 8) BL24S64 64kbits (8,192 8) belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 7 - 1 2 figure 6 . byte write figure 7 . page write figure 8 . soft write protection figure 9 . current address read s d a l i n e s t a r t d e v i c e a d d r e s s w r i t e m s b l s b r / w a c k f i r s t w o r d a d d r e s s s e c o n d w o r d a d d r e s s a c k l s b a c k l s b a c k l s b s t o p d a t a 0 0 0 0 0 0 0 1 0 1 s t a r t d e v i c e a d d r e s s w r i t e m s b l s b r / w a c k f i r s t w o r d a d d r e s s s e c o n d w o r d a d d r e s s a c k l s b a c k l s b a c k s t o p d a t a ( n ) a c k a c k d a t a ( n + 1 ) d a t a ( n + 1 ) s d a l i n e 0 0 0 0 0 0 0 1 0 1 s t a r t + f 0 s d a l i n e 1 1 1 1 0 0 0 0 s t a r t + 8 0 s d a l i n e 1 0 0 0 0 0 0 0 s t a r t d e v i c e a d d r e s s r e a d m s b l s b r / w a c k s t o p d a t a n o a c k s d a l i n e 0 0 0 0 1 0 1
BL24S64 64 kbits ( 8,192 8) BL24S64 64kbits (8,192 8) belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 8 - 1 2 figure 10 . random read figure 1 1 . sequential read s t a r t d e v i c e a d d r e s s w r i t e m s b l s b r / w a c k 1 s t , 2 n d w o r d a d d r e s s a c k l s b s t o p d a t a ( n ) d e v i c e a d d r e s s s t a r t r e a d a c k n o a c k d u m m y w r i t e s d a l i n e 0 0 0 0 1 0 1 d e v i c e a d d r e s s r e a d r / w a c k a c k a c k a c k s t o p d a t a ( n ) d a t a ( n + 1 ) d a t a ( n + 2 ) d a t a ( n + x ) n o a c k s d a l i n e
BL24S64 64 kbits ( 8,192 8) BL24S64 64kbits (8,192 8) belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 9 - 1 2 electrical characteristics absolute maximum stress ratings ? dc supply voltage . . . . . . . . . . . . . . . . . - 0.3v to +6.5v ? input / output voltage . . . . . . . .gnd - 0.3v to vcc+0.3v ? operating ambient temperature . . . . . - 40 to +85 ? storage temperature . . . . . . . . . . . . - 65 to +150 ? electrostatic pulse (human body model) . . . . . . . 8000v comments stresses above those listed under "absolute maximum ratings" may cause permanent damage to this device. these are stress ratings only. functional operation of this device at these or any other conditions a bove those indicated in the operational sections of this specification is not implied or intended. exposure to the absolute maximum rating conditions for extended periods may affect device reliability. dc electrical characteristics applicable over recommen ded operating range from: ta = - 40 to +85 , vcc = +1.7v to +5.5v (unless otherwise noted) table 4 pin capacitance applicable over recommended operating range from ta = 25 , f = 1.0 mhz, vcc = +1.7v table 5 parameter symbol min typ max unit condition supply voltage v cc1 1.7 - 5.5 v - supply voltage v cc2 2.5 - 5.5 v - supply current vcc=5.0v i cc1 - 0.14 0.3 ma read at 400khz supply current vcc=5.0v i cc2 - 0.28 0.5 ma write at 400khz supply current vcc=5.0v i sb1 - 0.03 0.5 a v in =v cc or v ss input leakage current i l1 - 0.10 1.0 a v in =v cc or v ss output leakage current i lo - 0.05 1.0 a v out =v cc or v ss input low level v il1 -0.3 - v cc 0.3 v v cc =1.7v to 5.5v input high level v ih1 v cc 0.7 - v cc +0.3 v v cc =1.7v to 5.5v output low level vcc=1.7v v ol1 - - 0.2 v i ol =0.15ma output low level vcc=5.0v v ol2 - - 0.4 v i ol =3.0ma parameter symbol min typ max unit condition input/output capacitance(sda) c i/o - - 8 pf v io =0v input capacitance(a0,a1,a2,scl) c in - - 6 pf v in =0v
BL24S64 64 kbits ( 8,192 8) BL24S64 64kbits (8,192 8) belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 10 - 1 2 ac electrical characteristics applicable over recommended operating range from ta = - 40 to +85 , vcc = +1.7v to +5.5v, cl = 1 ttl gate and 100 pf (unless otherwise noted) table 6 notes: 1. this parameter is characterized and is not 100% tested. 2. ac measurement conditions: rl (connects to vcc): 1.3 k input pulse voltages: 0.3 vcc to 0.7 vcc input rise and fall time: 50 ns input and output timing reference voltages: 0.5 vcc the value of rl should be concerned according to the actual loading on the user's system. min typ max min typ max clock frequency,scl f scl - - 400 - - 1000 khz clock pulse width low t low 0.6 - - 0.6 - - s clock pulse width high t high 0.4 - - 0.4 - - s noise suppression time t i - - 50 - - 50 ns clock low to data out valid t aa 0.1 - 0.55 0.1 - 0.55 s time the bus must be free before a new transmission can start t buf 0.5 - - 0.5 - - s start hold time t hd:sta 0.25 - - 0.25 - - s start setup time t su:dat 0.25 - - 0.25 - - s data in hold time t hd:dat 0 - - 0 - - s data in setup time t su:dat 100 - - 100 - - ns input rise time(1) t r - - 0.3 - - 0.3 s input fall time(1) t f - - 0.3 - - 0.3 s stop setup time t su:sto 0.25 - - 0.25 - - s data out hold time t dh 50 - - 50 - - ns write cycle time tw r - 1.9 3 - 1.9 3 ms 5.0v,25,byte mode(1) endurance 1m - - - - - write cycle parameter symbol 1.7vv cc 2.5v 2.5vv cc 5.5v units
BL24S64 64 kbits ( 8,192 8) BL24S64 64kbits (8,192 8) belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 11 - 1 2 bus timing figure 1 2 . scl: serial clock, sda: serial data i/o write cycle timing figure 1 3 . scl: serial clock, sda: serial data i/o notes : the write cycle time twr is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. s c l s d a _ i n s d a _ o u t t s u . s t a t h d . s t a t l o w t f t h i g h t l o w t h d . d a t t s u . d a t t r t s u . s t o t b u f t d h t a a t w r ( 1 ) a c k s t o p c o n d i t i o n s t a r t c o n d i t i o n s c l s d a w o r d n
BL24S64 64 kbits ( 8,192 8) BL24S64 64kbits (8,192 8) belling proprietary information. unauthorized photocopy and duplication prohibited ? 2016 belling all rights reserved www.belling.com.cn 12 - 1 2 package information wlcsp figure 1 4 notes: all wafer orientation notch down ordering information BL24S64 1 2 3 code description 1 cs: wlcsp - 4 2 packing type r: tape and reel t: tube 3 feature s: standard (default, pb free rohs std.) c : green ( halogen free) p i n 1 d e t o p v i e w ( m a r k s i d e ) a 1 a a 2 s i d e v i e w x 1 e 1 x 2 d 1 y 1 y 2 b b o t t o m v i e w ( b a l l s i d e ) c o m m o n d i m e n s i o n s ( u n i t s o f m e a s u r e = m i l l i m e t e r ) symbol min nom max a 0.270 0.290 0.310 a1 0.045 0.055 0.065 a2 0.215 0.235 0.255 d 0.738 0.758 0.778 d1 e 0.668 0.668 0.708 e1 b 0.160 0.180 0.200 x1 x2 y1 y2 0.179 ref 0.400bsc 0.400bsc 0.144 ref 0.144 ref 0.179 ref

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